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4953
TOP: FPGA & HDL
Summer 2017
Credits
3
|
Attributes
Upper Div
ZZTL
Sections
(2)
EE 4953
TOP: FPGA & HDL
2/17
Eratne, Savithra
TTh 6:00-7:55 PM
EE 4953
TOP: FPGA
13/17
Patel, Parimal
MW 6:00-7:55 PM
CRN
Title
Instructor
Time
Location
Seats
34123
TOP: FPGA & HDL
Eratne,
Savithra
2.8
TTh
6:00-7:55 PM
AET 0.212
2 open
15/17
36574
TOP: FPGA
Patel,
Parimal
4.3
MW
6:00-7:55 PM
EB 2.04.22
13 open
4/17
Instructors
Savithra Eratne
2.8
Parimal Patel
4.3
v0.7.1
GitHub
Status