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5323
TOP: Low Power VLSI Design
Spring 2018
Credits
3
|
Attributes
Graduate
Sections
(2)
EE 5323
TOP: Low Power VLSI Design
11/30
John, Eugene
Tue 6:00-8:45 PM
EE 5323
TOP: VLSI Design Methodology
19/25
Lee, Junghee
MW 6:00-7:15 PM
CRN
Title
Instructor
Time
Location
Seats
33388
TOP: Low Power VLSI Design
John,
Eugene
4.2
Tue
6:00-8:45 PM
EB 2.04.22
11 open
19/30
33389
TOP: VLSI Design Methodology
Lee,
Junghee
MW
6:00-7:15 PM
EB 2.04.04
19 open
6/25
Instructors
Eugene John
4.2
Junghee Lee
v0.7.1
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