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5323
TOP VLSI Design:ADV VLSI Desig
Spring 2012
Credits
3
|
Attributes
Graduate
Sections
(2)
EE 5323
TOP VLSI Design:ADV VLSI Desig
18/25
Liu, Bao
MWF 11:00-11:50 AM
EE 5323
TOP:Low power VLSI Design
7/30
John, Eugene
TTh 7:00-8:15 PM
CRN
Title
Instructor
Time
Location
Seats
27933
TOP VLSI Design:ADV VLSI Desig
Liu,
Bao
3.6
MWF
11:00-11:50 AM
MH 3.03.20
18 open
7/25
25929
TOP:Low power VLSI Design
John,
Eugene
4.2
TTh
7:00-8:15 PM
AET 0.214
7 open
23/30
Instructors
Bao Liu
3.6
Eugene John
4.2
v0.7.1
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